The present invention relates to apparatus for manufacturing of integrated circuits.
One of the basic problems in integrated circuit manufacturing is particulates. This problem is becoming more and more difficult, because of two trends in integrated circuit processing: First, as device dimensions become smaller and smaller, it is necessary to avoid the presence of smaller and smaller particles. This makes the job of making sure that a clean room is really clean increasingly difficult. For example, a clean room which is of class 1 (has one particle per cubic foot) for particles of one micron and larger may well be class 1000 or worse if particle sizes down to 100 angstroms are counted.
Second, there is increased desire to use large size integrated circuit patterns: for example, integrated circuit sizes larger than 50,000 square mils are much more commonly used now than they were five years ago.
Thus, particulates are not only an extremely important source of loss in integrated circuit manufacturing, but their importance will increase very rapidly in the coming years. Thus, it is an object of the present invention to provide generally applicable methods for fabricating integrated circuits which reduce the sensitivity of the process to particulate contamination.
One of the major sources of particulate contamination is human-generated, including both the particles which are released by human bodies and the particles which are stirred up by equipment operators moving around inside a semiconductor processing facility (front end). To reduce this, a general trend in the industry for several years has been to make more use of automatic transfer operations, wherein a technician can, for example, place a cassette of wafers into a machine, and then the machine automatically transfers the wafers, one by one, from the cassette through the machine (to effect the processing steps necessary) and back to the cassette, without the technician's having to touch the wafers.
However, the efforts in this direction have served to highlight the importance of a second crucial source of particulates, which is particulates generated internally by the wafers and/or transfer mechanism. That is, when the surface of the wafer jostles slightly against any other hard surface, some particulates (of silicon, silicon dioxide, or other materials) are likely to be released. The density of particulates inside a conventional wafer carrier is typically quite high, due to this source of particulates.
The present invention advantageously solves this problem, by providing a wafer carrier wherein particulate generation during transport is reduced in several ways. First, the door of the vacuum carrier contains elastic elements to press the wafers lightly against the back of the carrier box. Thus, when the door of the box is closed, the wafers are restrained from rattling around, which reduces the internal generation of particulates. Second, the wafers are supported at each side by a slightly sloping shelf, so that minimal contact (line contact) is made between the wafer surface and the surface of the shelf. This reduces generation of particulates by abrasion of the surface of the wafer.
The present invention not only reduces generation of particulates in the carrier during transport and storage, but also advantageously reduces transport of particulates to the wafer face during transport and storage, by carrying the wafers face down, under a high vacuum. The prior art is not know to address this problem at all.
The present invention provides greatly improved low particulate wafer handling and loading operations, wherein wafers can be transported, loaded and unloaded without ever seeing atmospheric or even low vacuum conditions. This is extremely useful, because, at pressures of less than about 10 to the -5 Torr, there will not be enough Brownian motion to support particulates of sizes larger than about 10 nm, and these particulates will fall out of this low-pressure atmosphere relatively rapidly.
FIG. 3 shows the time required for particles of different sizes to fall one meter under atmospheric pressure. Note that, at a pressure of 10 to the -5 Torr (1E-5 Torr) or less, even 10 nm particles will fall one meter per second, and larger particles will fall faster. (Large particles will simply fall ballistically, at the acceleration of gravity.) Thus, an atmosphere with a pressure below 10 to the -5 Torr means fthat particles ten nanometers or larger can only be transported ballistically, and are not likely to be transported onto the critical wafer surface by random air currents or Brownian drift.
The relevance of this curve to the present invention is that the present invention is the first to provide a way to transport wafers from one processing station to another, including loading and unloading steps, without ever exposing them to higher pressures than 1E-5 Torr. This means that the wafers are NEVER exposed to airborne particulates, from the time they are loaded into the first vacuum processing station (which might well be a scrubbing and pumpdown station) until the time when processing has been completed, except where the processing step itself requires higher pressures (e.g. in conventional photolithography stations or for wet processing steps). This means that the total possibilities for particulate collection on the wafers are vastly reduced.
The present invention provides a vacuum-tight wafer carrier, which can be used with a load lock which includes an apparatus for opening a vacuum wafer carrier under vacuum, for removing wafers from the carrier in whatever random-access order is desired, and for passing the wafers one by one through a port into an adjacent processing chamber, such as a plasma etch chamber. Moreover, the load lock preferably used with the present invention is able to close and reseal the wafer carrier, so that the load lock itself can be brought up to atmospheric pressure and the wafer carrier removed, without ever breaking the vacuum in the wafer carrier.
Another advantage of the wafer carrier of the present invention is that this wafer carrier CANNOT inadvertently be opened outside a clean room. A substantial yield problem in conventional clean room processing is inadvertent or careless exposure of wafers to particulates by opening the wafer carrier outside the clean room environment. However, with the wafer carrier of the present invention this is inherently impossible, since the pressure differential on the door of the carrier holds it firmly shut except when the carrier is in vacuum. This is another reason why the present invention is advantageous in permitting easy transport and storage of wafers outside a clean room environment.
According to the present invention there is provided: A wafer carrier comprising: a box having first and second sidewalls and a top and a bottom and a back side, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, a door closable to cover said box, said door having an elastic element on the inner surface thereof, said elastic element holding wafers of said predetermined size against the back of said box when said door is closed.
According to the present invention there is provided: A wafer carrier comprising: a box having sidewalls and a top and a bottom and a back side, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said ledges on said sidewalls having at least one surface thereof sloped to be at least 5 degrees out of parallel with the plane of said bottom of said box and also at least 5 degrees out of parallel with the plane of said top of said box.
According to the present invention there is provided: A wafer carrier comprising: a box having first and second sidewalls and a top and a bottom and a back side, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said back side having a flat surface portion on the interior of of said box; and a door closable to cover said box, said door having an elastic element on the inner surface thereof, said elastic element when said door is closed being spaced from said flat surface portion of back side of said box by less than the width of said predetermined wafer size.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box, wherein said wafers are carried in a substantially face-down position.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box, wherein said box comprises first and second sidewalls and a top and a bottom and a back side and a door closable to make a vacuum-tight seal to said box, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said door having an elastic element on the inner surface thereof, said elastic element holding wafers of said predetermined size against the back of said box when said door is closed.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box, wherein said box comprises first and second sidewalls and a top and a bottom and a back side and a door closable to make a vacuum-tight seal to said box, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said ledges on said sidewalls having at least one surface thereof sloped to be at least 5 degrees out of parallel with the plane of said bottom of said box and also at least 5 degrees out of parallel with the plane of said top of said box.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the step of: carrying said wafers under vacuum in a vacuum-tight box, wherein said wafers are carried in a substantially face-down position, and wherein said box comprises first and second sidewalls and a door closable to make a vacuum-tight seal to said box, said sidewalls of said box each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said door having an elastic element on the inner surface thereof, said elastic element holding wafers of said predetermined size against the back of said box when said door is closed.
According to the present invention there is provided: A method of transporting integrated circuit wafers during fabrication, comprising the steps of: carrying said wafers under vacuum in a vacuum-tight box, wherein said box comprises first and second sidewalls each having plural ledges thereon defining slots in said box to hold wafers of a predetermined size, said ledges on said sidewalls having at least one surface thereof sloped to be at least 5 degrees out of parallel with the plane of said bottom of said box and also at least 5 degrees out of parallel with the plane of said top of said box.